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Publications

Principal Publications of Last Five Years (partial list)

  1. “A study of carrier-trap generation by Fowler-Nordheim tunneling stress on polycrystalline-silicon/ SiO2/ silicon structures”, J. Jiang, O.O. Awadelkarim, and Y.D. Chan: Solid-State Electonics, 41(1), 41-46 (1997).
  2. “The impact of metal-1 plasma processing-induced hot carrier injection on the characteristics and reliability of n-MOSFETs”, M.G. ElHassan, O.O. Awadelkarim, and J. Werking: IEEE Transactions on Electronic Devices, 45(4), 861-866 (1998).
  3. “The dependence of the performance and reliability of n-MOSFETs on interlayer dielectric processing,L. Trabzon”, O.O. Awadelkarim, and J. Werking: J. Vacuum Science and Technology B1, 7(5), 2216-2221 (1999).
  4. “The impact of trench geometry and processing on the performance and reliability of low voltage power UMOSFETs”, S.A. Suliman, N. Gollagunta, L. Trabzon, J. Hao, G. Dolny, R. Ridley, T. Grebs, J. Benjamin, C. Kocon, J. Zeng, C.M. Knoedler, M. Horn, O.O. Awadelkarim, S.J. Fonash, and J. Ruzyllo: Proceedings of the 39th International Reliability Physics Symposium, Sponsored by IEEE Electron Devices Society and IEEE Reliability Society, Orlando, FL, April 30th–May 3rd, 308-314 (2001).
  5. “The dependence of UMOSFET characteristics and reliability on geometry and processing”, S.A. Suliman, N. Gollagunta, L. Trabzon, J. Hao, R.S. Ridley, C.M. Knoedler, G.M. Dolny, O.O. Awadelkarim, and S.J. Fonash: Semicond. Sci. Technol. 16, 447-454 (2001).
  6. “Characterization of gate oxide degradation mechanisms in trench-gated power MOSFETs using the charge pumping technique”, G. Dolny, N. Gollagunta, S.A. Suliman, L. Trabzon, M. Horn, O.O. Awadelkarim, S.J. Fonash, J. Hao, R.S. Ridley, T. Grebs, J. Zeng, and C. Kocon: Proceeding of 2001 International Symposium on Power Semiconductor Devices & ICs, ISPSD, 431-434 (2001).
  7. “The effects of channel boron doping on the performance and hot electron reliability of n-channel trench UMOSFETs”, S.A. Suliman, O.O. Awadelkarim, S.J. Fonash, G.M. Dolny, J. Hao, R.S. Ridley, and C.M. Knoedler: Solid-State Electronics, 45, 655-661 (2001).
  8. “The degradation of MOSFETs induced by the via etching of interlayer low-k polymers”, L. Trabzon and O.O. Awadelkarim: Proceedings of the 13th IEEE International Conference on Microelectronics (IMC), Rabat, Morocco, Oct. 29-31, 103-106, (2001).
  9. “Electron and hole trapping in the bulk and interface with Si of a thermal oxide grown on the sidewalls and base of a U-shaped silicon trench”, S.A. Suliman, O.O. Awadelkarim, S.J. Fonash, R.S. Ridley, G.M. Dolny, J. Hao, and C. M. Knoedler: Solid-State Electronics, 46(6), 837-845 (2002).
  10. “On the capacitance of metal/high-k dielectric material stack/silicon structures”, J. Jian, O.O. Awadelkarim, D-O Lee, P. Roman and J. Ruzyllo: Solid State Electronics, 46, 1991-1995 (2002).
  11. “Growth and reliability of thick gate oxide in U-trench for power MOSFETs”, C.T. Wu, R.S. Ridley, G. Dolny, T. Grebs, C. Knoedler, S.A. Suliman, B. Venkataraman, O.O. Awadelkarim and J. Ruzyllo: Proceeding of 2002 14th International Symposium on Power Semiconductor Devices & ICs, ISPSD, 149-152 (2002).
  12. “The utilization and effects of plasma exposure on materials properties of low-k polymers in microelectronics”, L. Trabzon and O.O. Awadelkarim: Proceedings of the 6th Biennial Conference on Engineering Systems Design and Analysis ESDA2002, Istanbul, Turkey, July 8-11 (2002).
research/ooa1/publications.txt · Last modified: 2014/01/28 18:17 by 127.0.0.1

 
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